Microprocessor RS-232 Reset

(C) 2002, G. Forrest Cook

Microprocessor RS-232 Break Reset Circuit


This circuit allows a remote microprocessor to be reset by a controlling host that sends a break signal over an RS-232 or RS-422 serial line. The break signal differs from normal RS-232 character data in that it is a long-duration space (logic 0) signal that produces a receiver framing error.

If the remote machine resets into a simple loader/monitor program, it is possible for the host to halt and restart or halt, reload and restart the program. This is an ideal way to develop software on older EPROM-based systems. Modern microprocessors use JTAG interfaces and EEPROM for similar results.

The circuit is usually used for developing code on a target processor, but it can also be used for permanent applications where the target program lives on a host system's disk. This system was once used to load code into a microprocessor-based satellite receiving system in Hawaii from a host system in Colorado using an Internet-based remote serial communications program.

A program loader for the Z-80 CPU is available below. The circuit has also been used with the Motorola 68HC11 EVB and the 6811 BUFFALO monitor program. See my Linux Cross Assemblers page for more info.


The circuit detects long duration zero-level signals (breaks) on a NRZ (non return to zero) serial data line. Normal serial characters spend a short time in the zero state, and are ignored by the circuit. Break signals hold the line low for several hundreds of milliseconds or longer, the circuit detects this and pulls the microprocessor reset line low.

The 1N4148 diode charges the 2.2uF capacitor from the normally-high logic level on the input. Low input signals slowly pull the charge on the 2.2uF capacitor down through the 10K resistor. High input signals quickly recharge the capacitor through the 1N4148 diode. A break signal lasts long enough to discharge the 2.2uF capacitor to the point where the following gate changes state.

The 1N4148 on the right side of the schematic prevents the outputs from the two parallel 74HC14 gates from being shorted to ground by the manual reset switches which are often found on target systems.

This circuit could be built with just 2 schmidt trigger non-inverting buffers, the 74HC14 was chosen because it is a common part. The parallel inverters are also optional, single inverters will also work.

Z-80 Program Loader

The sbld.mac code is a Z-80 assembly language program that functions as a bootstrap loader for use with this Microprocessor RS-232 Reset circuit. The code runs on an ancient SD systems SBC200 Z-80 circuit board and can be made to work with other Z-80 boards by changing the initialization and serial port functions.

Back to FC's Computer Boot Management Circuits page.